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Design closure
Results: 169

#	Item
41	Formal Design Constraints* Nils Klarlundy AT&T Labs{Research, [removed] Jari Koistinenz Add to Reading List Source URL: www.brics.dk Language: English - Date: 2007-03-08 16:48:36 CORBA Common Object Request Broker Architecture Component-based software engineering Inter-process communication Object-oriented programming Design closure IDL Parse tree Service-oriented architecture Software engineering Computing Electronic engineering
42	Proceedings of DETC’97: ASME DESIGN ENGINEERING TECHNICAL CONFERENCES SEPTEMBER 14-17, [removed]SACRAMENTO, CALIFORNIA DETC97/DFM-4352 A CASE STUDY IN MULTI-DISCIPLINARY DISTRIBUTED COLLABORATIVE DESIGN Add to Reading List Source URL: www.cs.utah.edu Language: English - Date: 2001-05-21 22:33:21 Engineering Computer-aided design Industrial design Mechanical engineering Design closure Optical lens design Camera lens Creo Elements/Pro Design Technology Optics
43	NUS Institutional Review Board (IRB) Final Report (For Closure of an IRB-Approved Research) Add to Reading List Source URL: www.nus.edu.sg Language: English - Date: 2014-11-12 20:55:38 Pharmacology Institutional review board Ethics Scientific method Research National University Hospital Clinical research Drug safety Design of experiments
44	Datasheet Synplify Premier Fast, Reliable FPGA Implementation and Debug Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2015-04-17 18:15:23 Electronic design Integrated circuits Fabless semiconductor companies Field-programmable gate array Logic synthesis High-level synthesis Timing closure Altera Integrated circuit design Electronic engineering Electronics Electronic design automation
45	Hierarchical Timing Analysis: Pros, Cons, and a New Approach By Pawan Gandhi, Naresh Kumar, Oleg Levitsky, Sharad Mehrotra, Ed Martinage, Brandon Bautz, Venkat Thanvantri, Prashant Sethia, and Ruben Molina, Cadence Desig Add to Reading List Source URL: www.cadence.com Language: English - Date: 2014-04-14 13:21:14 Integrated circuits Electronic design Signoff Timing closure Interface Logic Model Physical design Application-specific integrated circuit Static timing analysis Integrated circuit design Electronic engineering Electronics Electronic design automation
46	CONT AI NERI NNOVATI ON •CARBONATEDANDNON CARBONATEDSOF Add to Reading List Source URL: pmmi.files.cms-plus.com Language: English - Date: 2011-03-29 16:45:33 Containers Industrial engineering Industrial design Packaging and labeling Retailing Closure Packaging Machinery Manufacturers Institute Group O Energy drink Technology Packaging Business
47	How to Speed Signoff Extraction by 5X with Next-Generation Extraction Tool Tool Contributes to Faster Overall Design Closure By Hitendra Divecha, Cadence Design Systems Parasitic extraction, particularly in the digital Add to Reading List Source URL: www.cadence.com Language: English - Date: 2014-07-14 20:06:15 Integrated circuits Electronic design Parasitic extraction Signoff Application-specific integrated circuit Standard cell Process corners Engineering Change Order Cadence Design Systems Electronic engineering Electronic design automation Electronics
48	How to Achieve 10X Faster Power Integrity Analysis and Signoff By Jerry Zhao, Product Director, Cadence In our mobile computing era, system-on-chip (SoC) design has become much more complex, with challenges from complex Add to Reading List Source URL: www.cadence.com Language: English - Date: 2013-11-12 08:14:34 Integrated circuits Digital electronics Signoff Design closure Timing closure Power network design Integrated circuit design Application-specific integrated circuit Design rule checking Electronic engineering Electronic design automation Electronic design
49	Informing participants of allocation to placebo at trial closure: postal survey Add to Reading List Source URL: eprints.whiterose.ac.uk Language: English - Date: 2014-10-16 02:18:14 Science Pharmacology Design of experiments Bioethics Medical ethics Placebo Clinical trial Ted Kaptchuk Randomized controlled trial Medicine Clinical research Research
50	Pushing the Performance Boundaries of ARM Cortex-M Processors for Future Embedded Design By Ravi Andrew and Madhuparna Datta, Cadence Design Systems One of the toughest challenges in the implementation of any processors Add to Reading List Source URL: www.cadence.com Language: English - Date: 2014-10-22 13:27:53 Integrated circuits Placement Physical design Timing closure Power optimization Integrated circuit design Standard cell ARM architecture Cadence Design Systems Electronic engineering Electronics Electronic design automation